ARM EN0-001 Actual Free Exam Questions & Community Discussion

Which one of the following statements is TRUE for software breakpoints?

When an ARMv7-A MPCore system is in SMP mode, which of the following TWO operations can the processor handle automatically? (Choose two)

In an MPCore system, when one core is waiting for resources to be released, what instruction could be used to reduce that core's power consumption?

Which of these items is typically shared between threads running in the same Operating System (OS) process?

The following ARM instruction can be used to return from an exception:
movs pc, lr
Apart from the program counter, which register is updated by this instruction?

The following function is declared: float func(float fl, float f2);
The file file1 .c contains a call to func, and is compiled with hard floating point linkage. The file file2.c contains the definition of func, and is compiled with AACPS soft floating point linkage.
Assume that the two files are successfully linked using the ARM linker and an executable is generated. The generated executable:

Assuming a 4-core Cortex-A9 SMP system which does not use the Accelerator Coherency Port (ACP). and operates the L1 caches in writeback mode, in which of the following situations is a cache clean operation required?

In the CPSR, 1=0 and F=1. Which of the following is TRUE in this case?

In an ARMv7-A processor with Security Extensions, which of the following mechanisms best describes the way Secure memory is protected from access by software running in a Non-secure privileged mode?

In a Cortex-A9 processor, CP14 system control registers are used for:

In which type of storage will the compiler preferentially place frequently accessed variables?

An Advanced SIMD intrinsic has the prototype:
uint8xl6x2_t vld2q_u8 (uint8_t const * ptr);
How many bytes does this intrinsic load from memory?