ARM EN0-001 Actual Free Exam Questions & Community Discussion

On a processor supporting the Security Extensions, what sequence of operations is required to move from Non-secure User mode to Secure state?

In a Cortex-A9 MPCore cluster with four processors, which of the processors can be interrupted by a software-generated interrupt?

An ARMv7 implementation might include the VFPv4-D32 floating point extension. What does the '32' indicate?

An advantage of removable flash memory over built-in flash memory is that:

Which of the following memory attributes, specified in a translation table entry, could be used to protect a page containing a read-sensitive peripheral from speculative instruction fetches?

An advantage of native compiling over cross compiling is that:

Which of the following would enable the use of a symmetric multiprocessing (SMP) operating system?

In which TWO of the following locations would a compiler typically place local variables? (Choose two)

When linking with the standard C library, which library functions MUST be redefined in order to port your code to a new piece of production hardware?

An ARM Cortex-A9 multi-core system has two CPUs, C1 and C2, each with a corresponding data cache. The code running on C1 writes to a memory location M.
and C1 updates its data cache, but not main memory. After that, C2 tries to read the contents of memory location M.
Which of the following hardware can automatically (without software inteivention) ensure that C2 reads the updated contents of M?

When the processor is executing in Thumb state, which of the following statements is correct about the values stored in R15?

How is data written into NOR flash memory?