ARM EN0-001 Actual Free Exam Questions & Community Discussion
When using an Operating System, which instruction is used by user code to request a service from the kernel?
Correct Answer: A
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The instruction LDR pc, [ r1 ] takes longer to execute on a particular system, than the instruction LDR r0, [ r1 ]. In both cases, r1 points to the same address in external memory.
Which of the following is the most likely explanation of why it takes more cycles?
Which of the following is the most likely explanation of why it takes more cycles?
Correct Answer: C
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The Q-flag in the program status register (PSR) indicates which of the following?
Correct Answer: D
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When using the Performance Monitoring Unit to count runtime events the counter registers are limited to 32-bits. How can more than 2A32 events be counted without significantly impacting the software performance?
Correct Answer: D
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To ensure optimum efficiency when programming in C, what is the recommended maximum number of arguments to be passed to a function?
Correct Answer: A
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What debugger view can you use to determine which function caused an exception?
Correct Answer: C
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In an ARMv7 processor that includes the Advanced SIMD (NEON) extension, how many single precision floating point values can be stored in the Q0 register?
Correct Answer: B
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An application contains three calls to an external function, foobar(), which is defined in a shared (or dynamic) library. How many copies of foobar() will the linker place in the application image?
(Ignore linker inlining)
(Ignore linker inlining)
Correct Answer: D
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When building code for both ARM and Thumb states, which tool decides for each function call whether to use a BL or BLX instruction?
Correct Answer: B
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When applied to locations in memory configured using a write-back cache strategy, what does a data cache 'clean' operation do?
Correct Answer: C
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What type of instruction is used for cache maintenance operations?
Correct Answer: B
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